andWindsor15 Posted February 19, 2013 Share Posted February 19, 2013 (edited) Hi everyone, Can anyone help me to answer the question below? I would really appreciate it if you could help me. I have been searching for a solution for this question in books but could not find a proper explanation of how these things work. A processor has 24 registers, uses 8-bit immediates, and has 36 different instructions(corresponding to 36 operation codes) in its instruction set. These 36instructions are classified into 4 types as listed below: Type-A: takes 2 source registers, uses 1destination register; Type-B: takes 1 source register, uses 1destination register; Type-C: takes 1 source register, 1 immediate,uses 1 destination register; Type-D: takes 1 immediate, uses 1 destinationregister. Assume that the Instruction Set Architecture requires that all instructions be a multiple of 8 bits (1 byte) inlength, and the operation codes (opcodes) are of fixed length. a)How many bytes do we need to use toencode the Type-A instruction? b)How many bytes do we need to use toencode the Type-C instruction? Edited February 19, 2013 by andWindsor15 Link to comment Share on other sites More sharing options...
LaurieAG Posted February 21, 2013 Share Posted February 21, 2013 Basically it would be opcode length + address length + register contents length for both. http://en.wikipedia.org/wiki/Assembly_language MOV AL, 61h ; Load AL with 97 decimal (61 hex) Link to comment Share on other sites More sharing options...
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