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A question about address space

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Hi. I was just wondering about something. There's a lot of schematics out there for homebrew 8 bit computers, and these show the ROM and the RAM connected directly to the address and data buses. If the physical addresses in the ROM start from 0000, and the physical addresses in the RAM also start from 0000, how are conflicts avoided? How does the CPU or MMU split up the address space?

Thanks in advance.

32k + 32k invert the A15 stick it into the chip enable; one inverted, one not inverted!

Edited by Xittenn

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Does this mean that half of the address space has to be for ROM, halving the maximum amount of usable RAM in the system?

It means that you have a maximum addressable space of 64k. If you want to break this up either you need a decoder or you divide the thing into two modules, and address one with A15 and the other with A15 not. If you choose to do it this way you will only be able to have combinations of 1-32k RAM + 1-32k Rom, or 2 of one or the other. Use a decoder what are they like $2?? It's not any extra effort.

 

ROM*

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Thanks. I have seen some diagrams which show a small amount of ROM in the lower addresses, and RAM in the addresses just after it. I must have mis-interpreted these somewhere along the line.

Anyway. It seems the solution was simpler than I guessed. Thanks for your help.

I think you are familiar with the term "Relative Address", which is an addressing method, where every reservation have addresses that start from 0 ~ MAX

 

Where every reservation is given an index (a number) which is used to give the OFFSET,

 

Example: 4 reservations on a 2 MB RAM, what is the address range for the third ?

 

Answer:

 

- Every reservation capacity is ( 2 MB / 4 ) = 512 KB

 

- MAX = CAPACITY - 1 = 511 (since we start from 0)

 

- 3rd OFFSET = (3 - 1) * CAPACITY = 2 * 512 KB = 1024 KB

 

- 3rd Address Range = [OFFSET, OFFSET+MAX] = [1024 KB, 1535 KB] = [1048576, 1571840]

Edited by khaled

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