UnderGrad99

That helps some bit thanks, so all I have to do is shift the 0xA register over until the start of it meets a rising edge of the clock? Does the one before 0x9 become 0x0 so if the data is being shifted to the right?

Hi guys, I have come across a problem on a sample exam paper and I don't understand how to draw the timing diagram. I know how to draw timing diagrams but not ones with data as shown here and with two lines criss-crossing at many locations as shown in the picture. I don't understand how that is 'translated' through the clock signal. Any help is appreciated