Logic gates

[pulkit]

Microprocessors have millions of transistors that in essence are the realisation of logic gates.......

In practice what logic gates do you make on a a microprocessor ?

Do you make the 3 basic ones AND,OR and NOT ?

Or do you make everything using NAND ? or using NOR ?

Secondly, can a 2 bit XOR gate be realised using a single transistor ?

[mossoi]

I believe that microprocessors consist of exclusively NAND or NOR gates as they can be used to act as any other type of gate.

 

There's more info here: http://www.kpsec.freeuk.com/gates.htm

[e(ho0n3]

NAND and NOT gates are the simplest to make electrically (whether you are using TTL, CMOS, BiCMOS, GaAs, whatever). However, the amount of NAND gets used to make an XOR gate takes up too much space and therefore building a XOR gate from scratch (using CMOS or whatever) is sometimes preferred so not everything is made out of NAND and NOT logic. A microprocessor made entirely of pure NAND gates would require a larger surface area than one with mixed gate logic.

 

The answer to your fourth question is no. Transistors alone can't do the job. You need other kinds of electrical circuits (resistors, capacitors, etc.).

[pulkit]

Neglecting the regular circuit componenets such as resistors and capacitors, do you require anything over and above 1 transistor ?

[e(ho0n3]

I'm not what you mean by "over and above 1 transistor". Transistors are one of the basic building blocks for building ICs, there is nothing "above" this as far as I know.

[Cap'n Refsmmat]

He means, how many transistors in an XOR?

 

ps, why's your avatar HiMat?

[pulkit]

He means, how many transistors in an XOR?

 

Exactly

[e(ho0n3]

I have no idea how many transistors are used in an XOR gate. This sort of information is usually available in an IC's technical reference manual. Motorola makes XOR ICCs. I'm sure they have a PDF somewhere with the electrical diagram for it (so you can count the transistors yourself).

 

P.S. I changed my avatar because the last one didn't look good. Why not HiMAT? It's a cool looking aircraft in my opinion.

[Guest siliconhead]

by basic design, there are 8 transistors in a XOR

[pulkit]

by basic design, there are 8 transistors in a XOR

 

So is it cheaper to use XOR gates or make them using 4 (2-input) NAND gates / 5 (2-input) NOR gates ?

[YT2095]

NAND, because with the use of DeMorgans law, you can make ANY other gate using it

 

as for the single tran XOR, it IS possible with negative feedback from the emitter to cancel out the base input with a bias, but it`s not often used outside of discrete components.

 

THAT is your answer

[5614]

my question about a logic gate:

 

if you take a simple NOT gate, insert it into a circuit with bulb/battery/switch, if you open the switch [stopping the current from flowing] the NOT gate gets an input of 0A and 0V, so being a not gate, it creates a current or voltage [cant remember which one, to be exact!] so where does it make this current or voltage come from?

 

NOT gate: [binary]

input = 1. output = 0

input = 0. output = 1

 

in the 2nd one, how can a current or voltage be made from nowhere?

[pulkit]

Its not made from no-where.

 

Not gates require a power supply (Generally 5V), they don't work by magic )

[5614]

i thought so, in the IC chips they have an input, its just that in this electronic computer simulation program they dont, which when you design a circuit on it, it gets confusing, ok, thanks

[YT2095]

the +5 (or VDD and VCC) are taken as read, the only important part is the gate function(s). the power side of it is simple electrics (yes SIMPLE!). the real fun and relevance comes from the gates themselves

[pulkit]

IC 7404 : Inverter

 

It has 6 NOT gates

 

I had a data sheet which instructed me to connect 3 NOT gates in series to construct an inverter. Does this technique have any advantage over having just a single NOT gate (The only difference I can imagine is a delayed signal) ?

[YT2095]

it`ll have a propogation delay sure, but it`ll in micro secs (sometimes usefull) it is odd that on a 74 TTL series that 3 should be used though (usualy that`s only done on CMOS 4X series as they don`t like "lose ends AKA unused pins, becuase they stray and induce spurious currents in the substrate). the only reasons I can think of is the delay, a Schmidt type effect or the old school "tie up and use all free gates" thinking