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What generates idle heat in CPUs?


starchaser137

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All CPUs work with a 'clock' system.
Even if you 'idle' a CPU, clock pulses are still switched, and at GHz, switching produces a lot of heat.

Edited by MigL
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1 hour ago, MigL said:

All CPUs work with a 'clock' system.
Even if you 'idle' a CPU, clock pulses are still switched, and at GHz, switching produces a lot of heat.

Yes exactly. Sorry I couldn't frame it right. So does the clock itself produce this, or are there components connected to the clock that keep switching ( I want to know about those compnoents, what they are, counters maybe? ), does that produce the heat, or just the clock portion?

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6 hours ago, starchaser137 said:

Imagine a CPU sitting idle. It doesn't have any program loaded, nor is it a part of some large system.

It is just connected to power. What parts of the CPU are used during this time?

A CPU cannot have no program loaded. There is always the instruction it is executing, and the one after that.

A CPU consumes the most power from transistors changing states. It takes X amount of energy for a transistor to switch from on to off and back again, so you multiply that by the rate the switching takes place and you get an idea of the heat produced by the chip.  Many systems (laptops, phones especially) have a low power mode where the software recognizes low demand for services and puts the device into low power mode somehow. This probably involves a significant reduction in the clock rate which directly affects the rate at which those transistors change states.  At a lower clock rate, a lower voltage might be required to maintain this reduced performance, and low voltage also reduces the energy needed for the state changes.

1 hour ago, starchaser137 said:

So does the clock itself produce this, or are there components connected to the clock that keep switching ( I want to know about those compnoents, what they are, counters maybe? ), does that produce the heat, or just the clock portion?

The CPU is a synchronous device, so everything on it is dependent on the clock. If the clock is stopped altogether, the CPU does nothing and comsumes only static power which is minimal. It also would be totally incapable of recognizing a sudden demand for its services, so something outside the CPU would need to be involved in the monitoring of demand. It would not be software controlled since no software can run on a stopped CPU.

Not sure if any device actually stops the clock to a CPU on a device that isn't fully shut down.

Edited by Halc
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Further to Halc's post, this quote, regarding synchronous vs asynchronous logic, is pertinent

" Another problem is that the widely distributed clock signal takes a lot of power, and must run whether the circuit is receiving inputs or not."

from           Asynchronous circuit - Wikipedia

Asynchronous logic has been an active area of research since the 80s.
( I remember an article in BYTE magazine about it )

Most new ( advanced ( processors can shut down parts of the CPU if/when unused, but obviously not the I/O logic.

 

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6 hours ago, starchaser137 said:

Imagine a CPU sitting idle. It doesn't have any program loaded, nor is it a part of some large system.

It is just connected to power. What parts of the CPU are used during this time?

It depends*. "Idle", "connected to power" and "program loaded" may have different meaning. For instance ACPI** (Advanced Configuration and Power Interface) standard defines several different states where CPU has power but reduced capability to perform actions. States such as Halt, Stop-Clock, Sleep (C1, C2, C3) exists on the specification. 

So an answer might require more details to be known to be sure with state the CPU will operate in if it has power but no means to access any device or software. I do not know if there is a standard for default state and which parts of a specific CPU that would be active.

(This is an interesting question possibly touching many aspects of computer engineering.)

 

*) Im trying to interpret the question as stated by OP. Any contradiction to the previous good answers by @Halc, @MigL and others are unintentional and due to ambiguity. 

**)https://uefi.org/sites/default/files/resources/ACPI_Spec_6_3_A_Oct_6_2020.pdf

Edited by Ghideon
grammar
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6 hours ago, starchaser137 said:

Imagine a CPU sitting idle. It doesn't have any program loaded, nor is it a part of some large system.

It is just connected to power. What parts of the CPU are used during this time?

You cannot have a CPU "just connected to the power", and not connected to anything else.

It is the most basic rule of logic circuitry that all connections (inputs, outputs, control terminals) must be conncted to something.
If you do not do so then the conditions at the terminals will be indeterminate (not much use in a logic circuit) and may lead to damaging electrical runaway conditons.

In fact a CPU has several power supplies, and the power supply itself which provides these is a sophisticated system that brings the power up gradually in the correct order, and after the already mentioned clock signal and other connections are available.

Programs are not loaded into the CPU. They are loaded into a memory array. The CPU has what is known as in instruction set. This is basically a map of the outputs generated by possible combinations of inputs. Not all possibilities are used.

When all the power and connections are available the CPU is designed to enter a standard state and load whatever is found/presented at the 'input' terminals by the external circuitry.
 

 

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  • 2 months later...
On 4/9/2021 at 7:53 AM, starchaser137 said:

Imagine a CPU sitting idle. It doesn't have any program loaded, nor is it a part of some large system.

It is just connected to power. What parts of the CPU are used during this time?

This arises primarily from the nature of MOS transistors which are used to build everything, even the basic logic gates are made from such transistors.

With CMOS there are two switches (transistors) in series and where they meet is the "output" by design only one of these switches is ever "on" (which is where the term "complimentary" comes from, they switch on/off in opposite senses when they are activated).

When a state change occurs then the transistor that is on goes off and the transistor that is off goes on, imagine two mechanical switches geared together so the when you switch one on the other goes off and vice versa.

There is a problem though and that is that the transition from off-to-on or on-to-off is never instantaneous, it takes time, perhaps picoseconds but there is a point in time where both switches are half on and half off, that means some current is flowing - very briefly - through both switches and that is where the waste comes from.

In a static digital circuits CMOS consumes close to no power at all, no transistors are passing current power is only consumed when there are transitions, other technologies can switch faster (or this was the case, not so sure nowadays) but always consume some power whether a switch is on or off.

So with CMOS the higher the clock rate the higher the number of times we get this half on/off state and so the higher the number of times current is flowing.

 

 

 

 

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4 hours ago, Holmes said:

This arises primarily from the nature of MOS transistors which are used to build everything, even the basic logic gates are made from such transistors.

With CMOS there are two switches (transistors) in series and where they meet is the "output" by design only one of these switches is ever "on" (which is where the term "complimentary" comes from, they switch on/off in opposite senses when they are activated).

When a state change occurs then the transistor that is on goes off and the transistor that is off goes on, imagine two mechanical switches geared together so the when you switch one on the other goes off and vice versa.

There is a problem though and that is that the transition from off-to-on or on-to-off is never instantaneous, it takes time, perhaps picoseconds but there is a point in time where both switches are half on and half off, that means some current is flowing - very briefly - through both switches and that is where the waste comes from.

In a static digital circuits CMOS consumes close to no power at all, no transistors are passing current power is only consumed when there are transitions, other technologies can switch faster (or this was the case, not so sure nowadays) but always consume some power whether a switch is on or off.

So with CMOS the higher the clock rate the higher the number of times we get this half on/off state and so the higher the number of times current is flowing.

Originally, TTL and CMOS are true all-rounders integrated circuits. TTL technology is tending to be replaced by CMOS technology.

TTL is the abbreviation of Transistor-Transistor Logic , with Bipolar Junction Transistors (BJTs)
CMOS is the abbreviation of Complementary Metal Oxide Semiconductor , with Field Effect Transistors (FET)

CMOS in computer science is a special memory chip on the motherboard that stores and maintains BIOS configuration settings. The CMOS RAM is battery powered to ensure permanent date and time indication and to save configuration settings, even when the computer is turned off.

It is true that CMOS microprocessors were manufactured in the same way as INTEL technology in the 1980s. CMOS technology will ensure the commercial and technological future of MOSFET in integrated electronics, but will be liquidated in 2001.

Not to be confused with MOS technology

Here is an example of microprocessor architecture: von Neumann architecture - Wikipedia
Here is another example of microprocessor architecture: Intel's 4004 First microprocessor on the market, the first successful integration of all the functions of a processor into a single integrated circuit. 



But to answer the OP, apart from a software resource greedy in CPU, I do not see. Indeed the activity of the CPU is done by software instructions. No software, no resources (around ~1% for computer peripheral activity)
 


PS: I re-edit the MOS Technology link that wasn't work.

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